Wafer Level Packaging, Environmental Friendly Processing, New developments in deposition and etching

Fan-out Wafer Level Packaging
Wolfram Girke, SPTS Technologies GmbH, Dresden, Germany

Frontend meets Backend: Embedded Wafer Level Packages @IFX for Automotive Radar Applications
Walter Hartner, Infineon Technologies AG, Regensburg, Germany

Environmental-friendly F₂ based chamber cleaning
Robert Wieland¹, Michael Enzelberger-Heim², ¹Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT, Munich, Germany,
²Texas Instruments Deutschland GmbH, Freising, Germany

Photoresist and side-wall polymer removal with NMP free solvents
Alja Plosnik, SPM AG, Schaan, Liechtenstein

Nanometer Accuracy in Plasma Etching for Advanced Power Semiconductors
Georg Ehrentraut, Infineon Technologies Austria AG, Villach, Austria

Simulation of process variations in FINFET transistor patterning
Eberhard Bär, Fraunhofer IISB, Erlangen, Germany

Data-based optimization of plasma assisted wafer bonding
Georg Roeder, Fraunhofer IISB, Erlangen, Germany

Contamination free handling of advanced substrates
Markus Pfeffer, Fraunhofer IISB, Erlangen, Germany